Availability: reference design
FCC approval date: 07 November 2001
Power: 3.3 VDC, 3.5 A
Connector type: barrel
CPU1: Motorola MPC8245 (266 MHz)
FLA1: 8 MiB8,388,608 B <br />65,536 Kib <br />8,192 KiB <br />64 Mib <br />0.00781 GiB <br /> (Intel E28F640J3A-120)
RAM1: 16 MiB16,777,216 B <br />131,072 Kib <br />16,384 KiB <br />128 Mib <br />0.0156 GiB <br /> (Micron MT48LC2M32B2 × 2)
Expansion IFs: none specified
Serial: yes, DE-9
WI1 chip1: Atheros AR5210A
WI1 chip2: Atheros AR5110
WI1 802dot11 protocols: a
WI1 antenna connector: MMCX
ETH chip1: National Semiconductor DP83815
LAN speed: 100M
LAN ports: 1
802dot11 OUI: none specified
For a list of all currently documented Atheros (QCA) chipsets with specifications, see Atheros.
For a list of all currently documented Motorola chipsets with specifications, see Motorola.
802.11a Wireless Access Point
This device is assumed to use DP83815 and have 16MB RAM like
- the SMC SMC2755W (a device using this reference design).
The sample SSID is also indicated as Atheros 802.11a AP
- w/ 00:03:7F OUI (Atheros).
The FCC user guide indicates that this device uses VxWorks.
The default credentials for this entry are from the FCC manual.