Edgewater Networks EdgeMarc 4562T4W

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Edgewater Networks EdgeMarc 4562 T4W

Manuf (OEM/ODM): Runtop GVR6202 IV

FCC approval date: 15 June 2004
(Est.) release date: February 2007
Country of manuf.: China

Type: wireless router, analog phone gateway

IC ID: 5318A-4500
US: EWRDY01B4500

Power: 12 VDC, 3 A
Connector type: barrel
Conn. measurements: 5.5 mm (OD), 2.1 mm (ID), 9.5 mm (LEN)

CPU1: Intel XScale IXP425 (533 MHz)
FLA1: 16 MiB16,777,216 B <br />131,072 Kib <br />16,384 KiB <br />128 Mib <br />0.0156 GiB <br /> (Intel JS28F128J3D75)
RAM1: 64 MiB67,108,864 B <br />524,288 Kib <br />65,536 KiB <br />512 Mib <br />0.0625 GiB <br /> (Mira P2V56S40BTP-G6 × 2)

Expansion IFs: Mini PCI, USB 2.0
Mini PCI slots: 1
USB ports: 2
JTAG: yes, 20-pin header, unpopulated, CON4
Serial: yes, console port, DE-9, (9600 8N1)

WI1 module: Wistron NeWeb CM9
WI1 module IF: Mini PCI
WI1 chip1: Atheros AR5213A
WI1 chip2: Atheros AR5112A
WI1 802dot11 protocols: abg
WI1 antenna connector: RP-SMA

ETH chip1: Intel XScale IXP425
ETH chip2: IC+ IP101A
Switch: Realtek RTL8305SC
LAN speed: 100M
LAN ports: 4
WAN speed: 100M
WAN ports: 1


Additional chips
2-Wire RTC;Xicor;X1205;;1;
Phone Line Monitor IC;IXYSIC;CPC5710N;;6;
SOIC Phone Line Interface;IXYS;CPC5622A;;6;
Low EMI Clock Generator;Renesas;MK1707;;1;
5A Adjustable LDO Linear Regulator;Niko-Sem;L1084;;1;
USB 2.0/MS Combo Interface Host Controller;nVidia;M5273;;1;
Voice and InterNet Telephony Interface Circuit;Infineon;PEB 3324;;2;
Ringing SLIC with Integrated DC/DC Converter;Infineon;PEF 4268F;;2;
3A, 23V Step-Down Converter;Monolithic Power Systems;MP1583DN;;3;
Octal Transparent D-Type Latches w/ 3-State Output;TI;SN74LV373A;;1;
1A Fixed and Adjustable LDO Linear Regulator;Niko-Sem;L1117;;7;
Low-Power, Low-Offset Voltage,Dual Comparator;TI;LM393;;16;
Octal D-Type Flip Flop w/ 3-State Output;Philips;74ACH574;;1;
Octal Bus Transceiver w/ 3-State Output;NXP;74LVC244A;;1;
High Voltage Ringing SLIC Protector;Bourns;TISP61089B;;2;
3-to-8 Line Decoder/Demultiplexer;NXP;74LVC138A;;1;
3-State Quad Buffer/Line Driver;NXP;74LVC125A;;3;
Hex Inverting Schmitt Trigger;NXP;74AHC14;;1;
3.3V Zero Delay Buffer;Cypress;CY2305S;;1;
Quad 2-Input AND Gate;NXP;74AHC08;;1;
Quad 2-Input OR Gate;NXP;74LVC32A;;1;
3V RS232 Transceiver;Zywyn;ZT3243;;1;

Stock bootloader: RedBoot 2.02

Stock FW OS: Linux

Flags: T1/E1 Interface, analog phone port, RTC w/ battery, fan, metal case

Default IP address:
the IP is used by 1233 additional devices
of which 9 are Edgewater Networks devices
Default login user: root
Default login password: default
root:default credentials used by 14 additional devices
of which 9 are Edgewater Networks devices

802dot11 OUI: 00:0B:6B (2 E, 27 W)
Ethernet OUI: 00:03:6D (5 E, 3 W)

For a list of all currently documented Atheros (QCA) chipsets with specifications, see Atheros.
For a list of all currently documented Intel XScale SoC's with specifications, see Intel XScale.

EdgeMarc 4562T4W Converged Networking Router

EdgeMarc 4562TW Network Services Gateway
Quick Start Guide
  • "A/N:GPCVR6202-000-IV301", "P/N:GVR6202 Rev.IV" and
"START:2007/02/09" are silkscreened on base board.
  • "A/N:GPCVI4461-TED-IV300, "P/N:GVI4461 Rev.IV" and
"START:2006/11/10" are silkscreened on T1 daughter board.
  • "A/N:GPCVM1500-FOD-IV300, "P/N:GVM1500 Rev.IV" and
"START:2007/05/11" are silkscreened on SLIC daughter board.

Device has 4x T1/E1 RJ-45 interfaces and 8x RJ11 SLIC interfaces.

See also: Edgewater