Fiberlogic Matrix 21

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Fiberlogic Matrix 21

FCC approval date: 15 July 2004

Type: wireless router

Power: 5 VDC, 3 A
Connector type: barrel

CPU1: Brecis MSP2006 (166 MHz)
FLA1: 8 MiB 8,388,608 B <br />65,536 Kib <br />8,192 KiB <br />64 Mib <br />0.00781 GiB <br /> (Macronix Model? × 2)
RAM1: 32 MiB 33,554,432 B <br />262,144 Kib <br />32,768 KiB <br />256 Mib <br />0.0313 GiB <br /> (ESMT Model? × 2)

Expansion IFs: Mini PCI, USB 2.0
Mini PCI slots: 1
USB ports: 4

WI1 module: Fi Win WM68
WI1 module IF: Mini PCI
WI1 chip1: Intersil ISL3880
WI1 chip2: Intersil ISL3686A
WI1 802dot11 protocols: bg
WI1 antenna connector: U.FL, RP-SMA

ETH chip1: Brecis MSP2006
Switch: ADMtek ADM6996
LAN speed: 100M
LAN ports: 4
WAN speed: 100M
WAN ports: 1

bg

Additional chips
USB 2.0 Controller;VIA;VT6212;;1;

Flags: schematics

Default IP address: 192.168.1.254
the IP 192.168.1.254 is used by 158 additional devices
of which 0 are Fiberlogic devices
Default login user: blank
Default login password: admin
blank:admin credentials used by 295 additional devices
of which 0 are Fiberlogic devices

802dot11 OUI: none specified

For a list of all currently documented Brecis SoC's with specifications, see Brecis.
For a list of all currently documented Intersil chipsets with specifications, see Intersil.


Wireless 1 WAN 4 LAN Multimedia Security VPN Router