Intersil ISL39300A
Intersil ISL39300A
Availability: reference design
FCC approval date: 08 September 2003
Country of manuf.: USA
Type: access point
Power: 9 VDC, 0.75 A
Connector type: barrel
CPU1: Intersil ISL3893
FLA1: ? MiB (STMicroelectronics Model?)
RAM1: 8 MiB8,388,608 B <br />65,536 Kib <br />8,192 KiB <br />64 Mib <br />0.00781 GiB <br /> (Micron MT48LC4M16A2TG-75)
Expansion IFs: none specified
WI1 chip1: Intersil ISL3893
WI1 chip2: Intersil Model?
WI1 802dot11 protocols: abg
WI1 antenna connector: U.FL
ETH chip1: Intersil ISL3893
ETH chip2: Realtek RTL8201BL
ETH chip3: Realtek RTL8201BL
LAN speed: 100M
LAN ports: 1
WAN speed: 100M
WAN ports: 1
abg
802dot11 OUI: none specified
For a list of all currently documented Intersil chipsets with specifications, see Intersil.
PRISM 54Mbps Wireless Local Area Network Access Point
The Intersil logo and "ISL39300A" and "REV D" is silkscreened on the board in the FCC photos.
This device has two FCC IDs...
- One filed under the Intersil grantee code (OSZ) - OSZ39300A
- One filed under the Globespan Virata grantee code (RGS) - RGS39300A